{"id":198,"date":"2026-03-19T08:24:00","date_gmt":"2026-03-19T00:24:00","guid":{"rendered":"https:\/\/www.han-sphere.com\/?p=198"},"modified":"2026-03-18T22:21:52","modified_gmt":"2026-03-18T14:21:52","slug":"high-speed-pcb-layout-routing-best-practices","status":"publish","type":"post","link":"https:\/\/www.han-sphere.com\/de\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/","title":{"rendered":"Best Practices f\u00fcr High-Speed PCB-Layout und Routing"},"content":{"rendered":"<p>Da die Datenraten in den Multi-Gigabit-Bereich vordringen (z. B. DDR5, PCIe Gen6 und 112G SerDes), kann eine Leiterbahn auf der Leiterplatte nicht mehr als einfacher Draht betrachtet werden. Sie ist ein <strong>\u00dcbertragungsleitung<\/strong>. Bei hohen Frequenzen bestimmt die physische Geometrie der Leiterplatte direkt die elektrische Leistung.<\/p>\n\n\n\n<p>In diesem Leitfaden gehen wir \u00fcber das \u201cgrundlegende Routing\u201d hinaus und erforschen die fortgeschrittene Physik von <strong>Signalintegrit\u00e4t (SI)<\/strong> und wie Sie sicherstellen k\u00f6nnen, dass Ihr <a target=\"_blank\" rel=\"noreferrer noopener\" href=\"https:\/\/www.han-sphere.com\/high-frequency-pcb\/\">Hochfrequenz-Leiterplatte<\/a> bei der ersten Umdrehung korrekt funktioniert.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"486\" src=\"http:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design.jpg\" alt=\"Hochgeschwindigkeits-PCB-Layout\" class=\"wp-image-199\" srcset=\"https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design.jpg 600w, https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-300x243.jpg 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/figure>\n<\/div>\n\n\n<h2 class=\"wp-block-heading\">1. Das Fundament: Stack-up und Impedanzkontrolle<\/h2>\n\n\n\n<p>Das Hochgeschwindigkeitsdesign beginnt mit dem Substrat, nicht mit den Leiterbahnen. Wenn Ihr Lagenaufbau schlecht geplant ist, kann kein noch so sch\u00f6nes Routing das Signal retten.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Bezugsebenen sind nicht verhandelbar:<\/strong> Jedes Hochgeschwindigkeitssignal muss eine durchgehende, ununterbrochene Bezugsebene (Masse oder Strom) haben, die direkt an das Signal angrenzt. Dies minimiert die <strong>Schleifeninduktivit\u00e4t<\/strong>.<\/li>\n\n\n\n<li><strong>Kontrollierte Impedanz:<\/strong> Die meisten Hochgeschwindigkeitsschnittstellen erfordern eine bestimmte Impedanz (in der Regel $50\\Omega$ single-ended oder $90\\Omega\/100\\Omega$ differential).<\/li>\n\n\n\n<li><strong>Experten-Tipp:<\/strong> Arbeiten Sie mit Ihrem <a href=\"https:\/\/www.han-sphere.com\/pcb-manufacturing\/\" target=\"_blank\" rel=\"noreferrer noopener\">PCB-Herstellung<\/a> Partner <em>vor<\/em> Sie mit dem Routing beginnen. Fragen Sie nach den Ergebnissen des Stack-up-Rechners auf der Grundlage ihrer spezifischen FR4- oder Rogers-Materialien.<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">2. Erweiterte Routing-Taktiken<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\">Differential-Paar-Routing<\/h3>\n\n\n\n<p>Differenzielle Signal\u00fcbertragung (wie USB 3.0 oder HDMI) beruht auf der Unterdr\u00fcckung von Gleichtaktst\u00f6rungen.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Symmetrie beibehalten:<\/strong> Die beiden Leiterbahnen m\u00fcssen gleich lang sein (innerhalb von Millimetern) und einen konstanten Abstand haben.<\/li>\n\n\n\n<li><strong>Der Mythos \u201cEnge Kopplung\u201d:<\/strong> W\u00e4hrend die Kopplung gut ist, ist die Einhaltung eines konstanten Abstands zur Referenzebene f\u00fcr die Impedanzstabilit\u00e4t wichtiger als der Abstand zwischen den beiden Leiterbahnen selbst.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">\u00dcber Management: Die verborgene Kapazit\u00e4t<\/h3>\n\n\n\n<p>Durchkontaktierungen sind \u201cBremsschwellen\u201d f\u00fcr Hochgeschwindigkeitssignale. Sie f\u00fchren parasit\u00e4re Kapazit\u00e4ten und Induktivit\u00e4ten ein.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Minimieren Sie die Anzahl der \u00dcberg\u00e4nge:<\/strong> Idealerweise sollten Hochgeschwindigkeitssignale auf einer Ebene bleiben.<\/li>\n\n\n\n<li><strong>Back-Drilling:<\/strong> Bei Ultra-High-Speed-Designs (25 Gbps+) kann der ungenutzte \u201cStummel\u201d eines Vias als Resonator wirken und das Signal zerst\u00f6ren. <strong>R\u00fcckw\u00e4rtsbohren<\/strong> ist die professionelle L\u00f6sung, um diese Stummel zu entfernen.<\/li>\n\n\n\n<li><strong>Verwandt:<\/strong> Erfahren Sie, wie <a href=\"https:\/\/www.han-sphere.com\/hdi-pcb\/\" target=\"_blank\" rel=\"noreferrer noopener\">HDI-PCB<\/a> Technologie verwendet Mikrovias, um Stubs zu eliminieren und Platz zu sparen.<\/li>\n<\/ul>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"478\" src=\"http:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-2.jpg\" alt=\"Hochgeschwindigkeits-PCB-Layout\" class=\"wp-image-200\" srcset=\"https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-2.jpg 600w, https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-2-300x239.jpg 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/figure>\n<\/div>\n\n\n<h2 class=\"wp-block-heading\">5 Schritte zum professionellen High-Speed-Routing<\/h2>\n\n\n\n<div class=\"schema-how-to wp-block-yoast-how-to-block\"><p class=\"schema-how-to-description\"><strong>Ziel:<\/strong> Hardware-Ingenieure und PCB-Designer <br><strong>Schwerpunkt:<\/strong> Minimierung der Signalverschlechterung<\/p> <ol class=\"schema-how-to-steps\"><li class=\"schema-how-to-step\" id=\"how-to-step-1773843406021\"><strong class=\"schema-how-to-step-name\">Schritt 1: Pre-Layout-Simulation<\/strong> <p class=\"schema-how-to-step-text\">Verwenden Sie Tools wie HyperLynx oder die SI-Engine von Altium, um Ihre Constraints zu definieren. Kennen Sie Ihre <strong>Kritische L\u00e4nge<\/strong>-L\u00e4nge, ab der eine Leiterbahn wie eine \u00dcbertragungsleitung zu behandeln ist.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-1773843429249\"><strong class=\"schema-how-to-step-name\">Schritt 2: Bauteilplatzierung f\u00fcr k\u00fcrzeste Wege<\/strong> <p class=\"schema-how-to-step-text\">Platzieren Sie Hochgeschwindigkeits-ICs (CPU, FPGA) und den zugeh\u00f6rigen Speicher (DDR) so nah wie m\u00f6glich. Richten Sie sie so aus, dass \u00dcberschneidungen in den Adress- und Datenbussen minimiert werden.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-1773843441979\"><strong class=\"schema-how-to-step-name\">Schritt 3: Route der \u201cOpfer\u201d und \u201cAggressoren\u201d<\/strong> <p class=\"schema-how-to-step-text\">Leiten Sie die empfindlichsten Hochgeschwindigkeitssignale zuerst. Verwenden Sie die <strong>3W-Regel<\/strong> (der Abstand zwischen den Leiterbahnen sollte das Dreifache der Leiterbahnbreite betragen), um die <strong>Nebensprechen<\/strong>.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-1773843452986\"><strong class=\"schema-how-to-step-name\">Schritt 4: L\u00e4ngenanpassung (Tuning)<\/strong> <p class=\"schema-how-to-step-text\">Verwenden Sie das Serpentine-Routing, um die L\u00e4nge der Signale innerhalb eines Busses (wie DDR) anzupassen.<br\/><strong>Profi-Tipp:<\/strong> Stimmen Sie nicht nur die Gesamtl\u00e4nge ab, sondern auch die \u201cFlugzeit\u201d. Ber\u00fccksichtigen Sie die unterschiedlichen Signalgeschwindigkeiten auf internen und externen Schichten (Stripline vs. Microstrip).<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-1773843469639\"><strong class=\"schema-how-to-step-name\">Schritt 5: Post-Layout-DRC und Augendiagrammpr\u00fcfung<\/strong> <p class=\"schema-how-to-step-text\">Wenn m\u00f6glich, f\u00fchren Sie eine Simulation nach dem Layout durch, um die <strong>Augen-Diagramm<\/strong>. Ein \u201cweit ge\u00f6ffnetes Auge\u201d bedeutet ein sauberes Signal mit geringem Jitter und Rauschen.<\/p> <\/li><\/ol><\/div>\n\n\n\n<h2 class=\"wp-block-heading\">3. Umgang mit EMI (Elektromagnetische Interferenz)<\/h2>\n\n\n\n<p>Hochgeschwindigkeitsplatinen sind praktisch Antennen. So verhindern Sie, dass Ihre Platine die EMV-Zertifizierung nicht besteht:<\/p>\n\n\n\n<ol start=\"1\" class=\"wp-block-list\">\n<li><strong>Vermeiden Sie geteilte Flugzeuge:<\/strong> F\u00fchren Sie niemals ein Hochgeschwindigkeitssignal \u00fcber eine L\u00fccke in der Bezugsebene. Dadurch entsteht eine massive EMI-Schleife.<\/li>\n\n\n\n<li><strong>Vias n\u00e4hen:<\/strong> Verwenden Sie \u201cGround Stitching Vias\u201d am Platinenrand und in der N\u00e4he von Hochgeschwindigkeits-Via-\u00dcberg\u00e4ngen, um einen niederohmigen R\u00fcckweg zu schaffen.<\/li>\n\n\n\n<li><strong>Wahl des Materials:<\/strong> F\u00fcr 10GHz+ Anwendungen kann Standard FR4 zu verlustbehaftet sein. Erw\u00e4gen Sie <a href=\"https:\/\/www.han-sphere.com\/ceramic-pcb\/\" target=\"_blank\" rel=\"noreferrer noopener\">Keramische PCB<\/a> oder Hochfrequenzlaminate wie Rogers 4350B.<\/li>\n<\/ol>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full is-resized\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"473\" src=\"http:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-3.jpg\" alt=\"Hochgeschwindigkeits-PCB-Layout\" class=\"wp-image-201\" style=\"width:600px;height:auto\" srcset=\"https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-3.jpg 600w, https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-3-300x237.jpg 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/figure>\n<\/div>\n\n\n<h2 class=\"wp-block-heading\">4. Warum Pr\u00e4zision bei der Herstellung wichtig ist<\/h2>\n\n\n\n<p>Eine Abweichung von 1 Millimeter in der Leiterbahnbreite mag bei einem Spielzeug keine Rolle spielen, aber bei einem <a target=\"_blank\" rel=\"noreferrer noopener\" href=\"https:\/\/www.han-sphere.com\/rigid-pcb\/\">Starre PCB<\/a> bei einem 10-Gbps-Signal kann es zu einer erheblichen Impedanzverschiebung kommen.<\/p>\n\n\n\n<p>Unter <strong>Hansphere<\/strong>, Wir verwenden Laser-Direkt-Imaging (LDI) und fortschrittliche AOI (Automated Optical Inspection), um sicherzustellen, dass die physischen Leiterbahnen exakt mit Ihrem digitalen Design \u00fcbereinstimmen. Diese Pr\u00e4zision ist entscheidend f\u00fcr <a target=\"_blank\" rel=\"noreferrer noopener\" href=\"https:\/\/www.han-sphere.com\/pcb-assembly\/\">PCB-Montage<\/a> von BGA-Bauteilen mit 0,4 mm Abstand.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">FAQ - Hochgeschwindigkeits-PCB-Layout und Routing<\/h2>\n\n\n\n<div class=\"schema-faq wp-block-yoast-faq-block\"><div class=\"schema-faq-section\" id=\"faq-question-1767972361577\"><strong class=\"schema-faq-question\">Q1: Was ist der Unterschied zwischen Microstrip und Stripline?<\/strong> <p class=\"schema-faq-answer\"><strong>A:<\/strong> <strong>Microstrip<\/strong> befindet sich auf der \u00e4u\u00dferen Schicht (schneller, aber mehr EMI). <strong>Stripline<\/strong> ist zwischen zwei Massefl\u00e4chen eingeklemmt (langsamer, aber besser abgeschirmt und mit gleichm\u00e4\u00dfigerer Impedanz).<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1767972379031\"><strong class=\"schema-faq-question\"><strong>F2: Wann sollte ich \u201cTeardrops\u201d in meinem Layout verwenden?<\/strong><\/strong> <p class=\"schema-faq-answer\"><strong>A:<\/strong> Verwenden Sie Teardrops an der Verbindung von Leiterbahnen und Pads\/Vias. Sie verringern die mechanische Belastung und tragen zu einem allm\u00e4hlichen Impedanz\u00fcbergang bei, insbesondere bei <a href=\"https:\/\/www.han-sphere.com\/flex-pcb\/\" target=\"_blank\" rel=\"noreferrer noopener\">Flexible PCBs<\/a>.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1767972395830\"><strong class=\"schema-faq-question\"><strong>F3: Wie gehe ich mit 90-Grad-Ecken um?<\/strong><\/strong> <p class=\"schema-faq-answer\"><strong>A:<\/strong> Verwenden Sie sie niemals. 90-Grad-Ecken verursachen eine \u00c4nderung der Leiterbahnbreite am Scheitelpunkt, was zu Impedanzdiskontinuit\u00e4t f\u00fchrt. Verwenden Sie immer <strong>45-Grad-Biegungen<\/strong> oder abgerundete Ecken.<\/p> <\/div> <\/div>\n\n\n\n<h2 class=\"wp-block-heading\">Schlussfolgerung<\/h2>\n\n\n\n<p>Beim Hochgeschwindigkeits-Leiterplattendesign geht es um die Kontrolle der Umgebung, durch die die Elektronen flie\u00dfen. Durch die Beherrschung des Stapels, die Beachtung von R\u00fcckleitungen und die Anwendung fortschrittlicher Fertigungstechniken k\u00f6nnen Sie sicherstellen, dass Ihre komplexesten Designs mit felsenfester Stabilit\u00e4t funktionieren.<\/p>\n\n\n\n<p><strong>Ein Hochgeschwindigkeits-Meisterwerk bauen?<\/strong> \u00dcberlassen Sie Ihre Signalintegrit\u00e4t nicht dem Zufall. <strong><a target=\"_blank\" rel=\"noreferrer noopener\" href=\"https:\/\/www.han-sphere.com\/about\/\">Hansphere's Technik-Team<\/a><\/strong> bietet vollst\u00e4ndige DFM-Pr\u00fcfungen f\u00fcr Hochgeschwindigkeits-Layouts. <strong><a target=\"_blank\" rel=\"noreferrer noopener\" href=\"https:\/\/www.han-sphere.com\/contact\/\">Kontaktieren Sie uns heute<\/a><\/strong> um Ihre Projektspezifikationen zu besprechen.<\/p>\n\n\n\n<p><\/p>","protected":false},"excerpt":{"rendered":"<p>Lernen Sie praktische Layout- und Routing-Best-Practices f\u00fcr das Hochgeschwindigkeits-Leiterplattendesign kennen, einschlie\u00dflich Impedanzkontrolle, R\u00fcckleitungen, Durchkontaktierungen und Crosstalk-Management.<\/p>","protected":false},"author":1,"featured_media":202,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[4],"tags":[20],"class_list":["post-198","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","tag-high-speed-pcb-layout"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.5 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>High-Speed PCB Layout Guide 2026: Signal Integrity &amp; Routing Tactics<\/title>\n<meta name=\"description\" content=\"Master high-speed PCB design. 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Expert tips on impedance control, stack-up optimization, differential pair routing, and EMI reduction for DDR5, PCIe, and 5G.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.han-sphere.com\/de\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/\" \/>\n<meta property=\"og:site_name\" content=\"hansphere\" \/>\n<meta property=\"article:published_time\" content=\"2026-03-19T00:24:00+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-1.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"600\" \/>\n\t<meta property=\"og:image:height\" content=\"466\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"hansphere01\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Verfasst von\" \/>\n\t<meta name=\"twitter:data1\" content=\"hansphere01\" \/>\n\t<meta name=\"twitter:label2\" content=\"Gesch\u00e4tzte Lesezeit\" \/>\n\t<meta name=\"twitter:data2\" content=\"5\u00a0Minuten\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":[\"WebPage\",\"FAQPage\"],\"@id\":\"https:\/\/www.han-sphere.com\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/\",\"url\":\"https:\/\/www.han-sphere.com\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/\",\"name\":\"High-Speed PCB Layout Guide 2026: Signal Integrity & Routing Tactics\",\"isPartOf\":{\"@id\":\"https:\/\/www.han-sphere.com\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/www.han-sphere.com\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/#primaryimage\"},\"image\":{\"@id\":\"https:\/\/www.han-sphere.com\/blog\/news\/high-speed-pcb-layout-routing-best-practices\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.han-sphere.com\/wp-content\/uploads\/2026\/01\/high-speed-pcb-design-1.jpg\",\"datePublished\":\"2026-03-19T00:24:00+00:00\",\"author\":{\"@id\":\"https:\/\/www.han-sphere.com\/#\/schema\/person\/a8f2356806898d33a9f431801140e422\"},\"description\":\"Master high-speed PCB design. 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