High-Density Interconnect
HDI-LEITERPLATTE
Any-layer HDI with stacked microvias — enabling 0.35 mm BGA fan-out, maximum routing density and the thinnest possible boards for today's most advanced electronic products.
The board architecture behind the world's thinnest devices
High-Density Interconnect (HDI) PCB uses laser-drilled microvias, sequential lamination build-up and fine-line imaging to achieve routing densities that standard mechanical-drill PCBs physically cannot reach.
In any-layer HDI, a microvia can connect any two adjacent layers — not just outer layers to the next inner layer. This routing freedom eliminates the layer-jumping constraints of conventional designs, enabling SoC fan-out at 0.4 mm and 0.35 mm BGA pitch.
The result: smaller boards, fewer layers, shorter signal paths and better electrical performance — all simultaneously.
Get HDI Quote →
Three reasons engineers choose HDI for complex designs
HDI is not simply a finer PCB. It is a different interconnect architecture that expands what is physically possible in electronic product design.
Any-Layer Microvia Freedom
In standard PCBs, routing between non-adjacent layers requires a through-hole via that occupies space on every layer. In any-layer HDI, a 0.10 mm microvia connects only the two layers it needs to — leaving all other layers free for signal routing. This single change allows routing density increases of 2–4× over the same layer count on a standard board.
any-layer · stacked & staggered microvias · sequential lamination0.35 mm BGA Fan-Out — No Other Technology Works
Modern AI processors, mobile SoCs and high-bandwidth memory chips ship in 0.35 mm and 0.4 mm pitch BGA packages. Standard drill (0.2 mm min hole) cannot fit between pads at these pitches. Any-layer HDI with 0.10 mm laser via and via-in-pad fill is the only production-viable solution for these components.
0.35 mm pitch BGA · via-in-pad · 0.10 mm laser viaShorter Paths, Better Signals, Lower Power
A 10-layer HDI board is physically smaller than the 20-layer standard board it replaces. Shorter traces mean lower propagation delay, less insertion loss and reduced power consumption. For DDR5, PCIe 5.0 and 5G RF interfaces, signal quality often improves by moving to HDI — not just maintaining it.
shorter trace = lower loss · DDR5 / PCIe 5.0 · signal integrityFull HDI fabrication specification
All parameters verified through our ISO 9001 process. TDR impedance report supplied with every controlled-impedance order.
Parameter für die Herstellung
| Anzahl der Schichten | 4 – 30 layers (any-layer HDI) |
| Min. Spur/Leerzeichen | 2,5 / 2,5 mil |
| Min. Laser Via Diameter | 0.10 mm |
| Min. BGA Pitch | 0.35 mm (via-in-pad) |
| Sequential Lamination Cycles | Up to 6 build-up cycles |
Leistung und Standards
| Dicke der Platte | 0.4 mm – 3.2 mm |
| Kontrollierte Impedanz | ±5% TDR verified |
| Oberfläche | ENIG / ENEPIG / OSP / Immersion Ag |
| IPC Build Standard | Class 2 default · Class 3 on request |
| Prototyp-Umlaufzeit | 48h express · 5 days standard |
How HDI PCB is built — step by step
HDI fabrication requires multiple press cycles with laser drilling and plating between each — a fundamentally more complex process than standard PCB manufacturing.
Inner Core Imaging & Etch
Inner copper layers are patterned by photolithographic imaging and wet etch. Oxide treatment prepares surfaces for lamination adhesion.
First Lamination Press
Core layers and prepreg are stacked in optical registration and hot-pressed at 180°C. First build-up layers are added.
CO₂ Laser Microvia Drilling
0.10 mm microvias are formed by CO₂ laser with ±15 µm positional accuracy. Via walls are cleaned by plasma desmear.
Copper Plating & Fill
Electroless copper seeds via walls; electrolytic copper plates to target thickness. Via-in-pad vias are filled and planarised for flat SMT lands.
Where HDI PCB is the required technology
Any product where miniaturisation, high-speed signals and advanced packaging intersect.
Smartphones & Tablets
Flagship mobile mainboards with 10+ layers in under 0.8 mm total thickness, 0.4 mm pitch BGA fan-out.
Wearables & Hearables
Smartwatches, TWS earbuds and fitness trackers where every cubic millimetre of board space counts.
ADAS & Automotive Camera
High-resolution camera processor boards and LiDAR signal processing units in automotive perception systems.
5G & Telecom
5G small cell baseband boards, optical transceiver modules and next-generation network switching ASICs.
Medical Wearables
Continuous health monitors, insulin pumps and implantable control electronics requiring miniaturisation.
Laptops & Ultrabooks
Thin-core HDI mainboards routing DDR5, PCIe 5.0 and Thunderbolt 4 in sub-1.2 mm board thickness.
AR / VR Headsets
Mixed reality compute boards where display, camera and processing electronics share minimal volume.
Industrial IoT Edge
Compact edge AI boards integrating processor, wireless and fieldbus interfaces in DIN-rail housings.
HDI quality — verified at every lamination cycle.
Unlike standard PCBs, HDI quality must be confirmed at each build-up cycle. Our process includes inter-cycle AOI, laser drill registration check and post-plate microsection on every qualification lot.
- ISO 9001 : 2015Von Dritten geprüftes Qualitätsmanagement
- IPC-A-600 Class 2 / 3HDI acceptability per IPC-6016
- IPC-6016Microvia technology qualification standard
- RoHS / REACHEinhaltung der EU-Vorschriften für gefährliche Stoffe
Inspektions- und Prüfverfahren
- 100% AOI — After Each Lamination CycleLayer-by-layer optical inspection
- 100% Elektrischer Test - Fliegender TastkopfAlle Netze, jedes Brett
- X-Ray — Microvia Registration VerificationStacked via alignment check
- Microsection — Microvia PlatingCu thickness per IPC-6016 Class B/C
- TDR-Impedanz-Prüfung±5% für alle kontrollierten Strukturen
- Via-Fill Planarisation CheckSurface profile profilometry
- Bow and TwistIPC-TM-650 2.4.22
- Laser Via Depth — SEM Cross-sectionOn qualification lots
HDI boards we have built
Real designs, real specifications, real outcomes.
10-Layer Any-Layer HDI Mainboard
0.4 mm BGA pitch, 0.10 mm microvias, via-in-pad fill, 0.68 mm total thickness for a flagship Android smartphone mainboard.
99% first-pass yield at production entry. Zero microvia-related field failures over 18-month warranty. Board area 22% smaller than previous design generation.
8-Layer ADAS Camera Processor
MIPI CSI-2 controlled impedance, 0.5 mm BGA fan-out, ENIG, -40°C to +85°C rated for an 8 MP surround-view automotive camera module.
Automotive thermal shock qualification passed first attempt. MIPI eye diagram met spec with 15% margin. On-time for OEM programme SOP milestone.
6-Layer HDI Wearable ECG Patch
0.28 mm total thickness, biocompatible ENIG, ultra-low-parasitic analog front-end for a 7-day ECG monitoring patch.
CE MDR Class IIa certification at first submission. 500,000 units shipped with zero board-level failures. ECG signal quality equivalent to clinical Holter.
Common questions about HDI PCB
Technical questions engineers ask most often before ordering any-layer HDI boards.
Standard HDI (1+N+1 or 2+N+2) only allows microvias on the outer build-up layers — inner layers still use through-hole vias for connections between them. Any-layer HDI allows a microvia between any two adjacent layers, giving full routing freedom without through-hole vias occupying space on every layer. Any-layer enables the routing density needed for 0.35–0.4 mm pitch BGAs.
Our standard minimum laser via diameter is 0.10 mm using CO₂ or UV laser, with positional accuracy of ±15 µm. For special applications, consult our engineering team. The via pad diameter is typically 0.25 mm minimum (0.10 mm via + 0.075 mm annular ring per side).
Yes. 0.35 mm pitch BGA fan-out requires via-in-pad with copper fill and planarisation. Our process achieves a flat, solderable surface directly over the microvia — compatible with standard paste printing and reflow assembly. 0.4 mm pitch fan-out is routinely achieved on all any-layer HDI builds.
We support up to 6 sequential lamination build-up cycles, corresponding to a maximum of 30 layers in an any-layer HDI construction. Each cycle adds one pair of build-up layers. Most HDI designs for mobile and wearable applications use 2–4 cycles (8–14 layers total).
ENIG (Electroless Nickel Immersion Gold) is the recommended surface finish for HDI boards. It provides a flat, solderable surface compatible with 0.35 mm pitch BGA assembly and is suitable for skin-contact applications. ENEPIG (with palladium layer) is recommended for applications requiring wire bonding in addition to SMT.
Via-in-pad places a microvia directly under a component pad — typically a BGA pad. The via must be copper-filled and planarised to provide a flat solder surface. Specify via-in-pad when your BGA pitch is ≤0.5 mm and there is insufficient space for dog-bone escape routing, or when you need to minimise solder joint inductance on high-speed power delivery networks.
Get your HDI PCB design reviewed — today.
Send us your Gerber files and stack-up requirements. Our HDI engineers will return a full DFM report and quote within 8 working hours.
- DFM-Prüfung bei jeder Anfrage inbegriffen
- NDA auf Anfrage unterzeichnet - gängige Praxis
- Antwort innerhalb von 8 Arbeitsstunden
- 48-Stunden-Express-Prototyp verfügbar
- Unverbindliches Angebot anfordern
Angebot anfordern
Füllen Sie die nachstehenden Felder aus, und wir werden uns in Kürze mit Ihnen in Verbindung setzen.